1. Field of the Invention
The present invention relates to a solid-state image capturing device having a photoelectric transducer portion, a charge transfer portion for transferring a signal charge from the photoelectric transducer portion and a charge detector portion for detecting the signal charge, as well as an imaging apparatus using the solid-state image capturing device.
2. Description of the Related Art
A known conventional solid-state image capturing device is a CCD image capturing device capable of interline charge transfer. The CCD image capturing device has a two-dimensional matrix array of photoelectric transducer elements (pixels) that store incident light by converting it to a signal charge associated with its quantity, a plurality of vertical CCDs that are provided for the respective columns of photoelectric transducer elements and which transfer the signal charges vertically as they are read from the respective photoelectric transducer elements, a horizontal CCD that transfers the signal charge for one line (row) horizontally as it is being transferred from vertical CCDs, and a charge detector portion that outputs the signal charge transferred from the horizontal CCD after converting it to an electrical signal.
The charge detector portion of the CCD image capturing device under consideration has a floating diffusion amplifier configuration which is composed of a floating diffusion (FD) section by which the signal charges sequentially transferred from the horizontal CCD are converted to signal voltage (electrical signal), a reset drain (RD) section for draining charges, a reset gate (RG) section which clears the floating diffusion section of all charges so that they are dumped into the reset drain section, and a source follower circuit.
FIG. 12 shows a schematic configuration of a conventional CCD image capturing device, particularly the area around the charge detector portion. FIG. 12 is a diagrammatic representation of a cross-sectional profile of the final transfer stage 5 of the horizontal CCD, an output gate section 4, a floating diffusion section 1, a reset gate section 3 and a reset drain section 2, plus a circuit diagram for a source follower circuit 6. An n-type semiconductor substrate 11 has a p-type well 12 in which are formed a charge transfer channel 13, a flowing diffusion region 14 which is also made of an n-type impurity region and a reset drain region 15 also made of an n-type impurity region. Transfer gates 51 and 52 of the horizontal CCD and an output gate 41 are formed on the surface of the charge transfer channel 13, with an insulation film 20 interposed; a reset electrode 30 is formed between the floating diffusion region 14 and the reset drain region 15, again with the insulation film 20 interposed. The floating diffusion region 14 is connected to the source follower circuit 6.
In the output portion having the configuration shown in FIG. 12, the amount of change in the signal charge in the floating diffusion region 14 (ΔQ), the change in voltage (ΔV) and the static capacity (C) are related to each other by ΔV=ΔQ/C, describing that the sensitivity of signal voltage being output from the source follower circuit 6 (i.e., charge detection sensitivity) depends on the static capacity C of the floating diffusion region 14. Since the static capacity C of the floating diffusion region 14 which depends on the structures of the floating diffusion region 14 and its nearly area is constant, the charge detection sensitivity of the output portion is also constant.
As a result, if the charge detection sensitivity is raised by reducing the static capacity C in order to achieve sensitive imaging, the signal output in response to a quantity of incident light greater than a certain level becomes constant, producing a narrow dynamic range. A proposal for expanding the dynamic range by making the sensitivity of the charge detector portion variable is the solid-state image capturing device described in Japanese Patent Laid-Open No. 331706/1999.
The solid-state image capturing device described in Japanese Patent Laid-Open No. 331706/1999 changes the sensitivity of the charge detector portion between a mode for reading one pixel and a mode for reading more than one pixel. The change in charge detection sensitivity is in effect accomplished by changing the size of the floating diffusion region. The solid-state image capturing device under consideration has substantially the same structure as the device shown in FIG. 12, except that a plurality of adjacent reset gates are provided between the floating diffusion region and the reset drain region. By selectively driving the plurality of reset gates, the size of the floating diffusion region is altered to change its static capacity C. For instance, if the reset gate which is the closer to the floating diffusion region is held at a reset level whereas the other reset gates control charge storage and drain, the area beneath the reset gate being held at the reset level will in effect function as the floating diffusion region; as a result, the static capacity of the floating diffusion region increases to lower the charge detection sensitivity.
However, the reset gate section of the solid-state image capturing device described in Japanese Patent Laid-Open No. 331706/1999 is of a surface channel type, so it has the disadvantage of undergoing deterioration in S/N ratio. To be more specific, since the area beneath the reset gate is used as the charge accumulating floating diffusion region, charges in that area are captured by traps in the semiconductor surface and the accumulated signal charges will not be smoothly reset as required and the trapped charges will flow again into the floating diffusion region, occasionally causing adverse effects on the output signal.
As a further problem, Japanese Patent Laid-Open No. 331706/1999 only teaches a camera system capable of switching between the two modes, one for reading one pixel and the other for reading more than one pixel, by using the above-described solid-state image capturing device. This camera system is not considered to make the most of the variability of charge detection sensitivity.